| ANSI/VITA |
ANSI/VITA-Normen |
| VITA 1.5 |
Source Synchronous Transfer Protocol (2eSST) |
| ANSI/VITA 1.6 |
Keying for Conduction Cooled VME |
| ANSI/VITA 35 |
PMC to VME I/O Mapping |
| |
Normentwürfe der VSO |
| VITA 1.2 |
High Availability VME (H.A. VME) |
| VITA 1.4 |
Live Insertion for VME64x |
| VITA 2 |
ETL (Enhanced Transistor Logic) |
| VITA 2.1 |
ETL Enhancements |
| VITA 5.1 |
RACEway Interlink Extensions |
| VITA 15 |
TMbus |
| VITA 17.1 |
Gigabit Serial Front Panel Data Port (GS-FPDP) |
| VITA 20 |
Conduction Cooled PCI Mezzanine (ccPMC) |
| VITA 22 |
ATM CellBus (ACB) on VME |
| VITA 28 |
VPCI (Virtual PCI) |
| VITA 29 |
PC*MIP (PCI, M-Modules, Industry Packs) |
| VITA 30 |
2mm Connector Practice on Eurocards |
| VITA 30.1 |
2mm Connector Practice for ccEurocards |
| VITA 30.2 |
Power Connector Mechanical Interfaces |
| VITA 31 |
InfiniBand on J0/P0 |
| VITA 32 |
Processor PMC Standard (PPMC) |
| VITA 34 |
(reserved for serial architecture study group) |
| VITA 36 |
PMC I(O Transition Modules (PIM) |
| VITA 37 |
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